What Intel Learned When an Elevator Smashed Into Its Supercomputer Chips

In advancing from today's Ponte Vecchio processors to 2023's Meteor Lake, Intel says there's less risk of human error.

Stephen Shankland principal writer
Stephen Shankland has been a reporter at CNET since 1998 and writes about processors, digital photography, AI, quantum computing, computer science, materials science, supercomputers, drones, browsers, 3D printing, USB, and new computing technology in general. He has a soft spot in his heart for standards groups and I/O interfaces. His first big scoop was about radioactive cat poop.
Expertise processors, semiconductors, web browsers, quantum computing, supercomputers, AI, 3D printing, drones, computer science, physics, programming, materials science, USB, UWB, Android, digital photography, science Credentials
  • I've been covering the technology industry for 24 years and was a science writer for five years before that. I've got deep expertise in microprocessors, digital photography, computer hardware and software, internet standards, web technology, and other dee
Stephen Shankland
3 min read
Intel CEO Pat Gelsinger holds a Ponte Vecchio processor

Intel CEO Pat Gelsinger holds a Ponte Vecchio processor for supercomputers and other high-performance machines. The chip's package here shows spigots for attaching liquid cooling hoses.

Stephen Shankland/CNET

Intel has plenty of challenges in manufacturing processors. But it discovered a new one -- dangerous elevator doors -- during the development of Ponte Vecchio, the processor brains being used to construct the Aurora supercomputer.

Intel personnel were moving a bunch of the processors on a cart when a closing elevator door toppled it, Raja Koduri, leader of Intel's Accelerated Computing Systems and Graphics Group, said at Intel's Innovation conference Tuesday.  

He didn't say how many were ruined, but the loss stung because they were initial samples used to test performance and look for problems. "Every one of them at that stage is expensive," Koduri said in an interview. With hundreds of manufacturing steps, it takes months to make a single advanced chip.

The elevator door wasn't just a one-off bummer. It actually revealed a problem that stood in the way of Intel's effort to reclaim its processor manufacturing leadership: human error.

Ponte Vecchio is a mammoth processor with more than 100 billion transistors, just about as many as anybody's processor in the business. To make something that big, Intel used its advanced packaging methods to bring together 47 separate slices of silicon.

But that packaging relied on humans, carts and elevators that are much more fallible than the processes Intel typically uses to build chips.

Making Meteor Lake: More automation, fewer elevators

In contrast, Intel uses much more automation for the advanced packaging underlying its 2023 PC processor, code-named Meteor Lake. Meteor Lake's elements, called chiplets, will be joined into a single processor at Intel's new advanced packaging fabrication facility, or fab, near Portland, Oregon, Koduri said.

The Ponte Vecchio processor is designed to accelerate tasks like scientific calculations, graphics and artificial intelligence. It's now formally named Intel's Data Center GPU. Only the Aurora Supercomputer gets the processors now, but Intel plans to sell them more broadly starting in 2023, Koduri said. They compete chiefly against Nvidia's new Hopper H100 graphics processing units.

Supercomputers are important, but Meteor Lake is more important to Intel's fate. PC processors are one of the company's biggest product lines, and rivals AMD and Apple have grown more competitive.

With Meteor Lake Intel builds some of the chiplets with its own new Intel 4 manufacturing process, a key step on the company's effort to reclaim leadership lost to Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung.

But with an advanced packaging technology called Foveros, Intel also links those chiplets with others from TSMC. The advanced packaging methods let Intel advance some processor elements faster while cutting costs on others.

Ponte Vecchio uses Foveros and another Intel packaging technology called EMIB. Where Foveros stacks chiplets one atop another like pancakes, EMIB links their edges side to side with high-speed links. EMIB is key to another Intel processor -- its Sapphire Rapids chip coming to servers in 2023.

Intel CEO Pat Gelsinger shows how the Sapphire Rapids server processor is made of eight conjoined "chiplets"

Intel CEO Pat Gelsinger holds a Sapphire Rapids server processor, showing how it's made of eight "chiplets." The four central tiles house processing cores and the four smaller rectangles are high-bandwidth memory.

Stephen Shankland/CNET

In designing Ponte Vecchio, Intel expected troubles with packaging. But the company was surprised with how smoothly it worked.

"The thing that we were most worried about was advanced packaging," but the 47 chiplets went together smoothly, Koduri said in a press conference. The problems came from mundane problems like a bug in the PCI Express communications system.

That result helped convince Intel it could employ advanced packaging for a critical processor like Meteor Lake.

"It gave us a lot of confidence for higher volume products to do advanced packaging," Koduri said.