Sun caches in with processor plans

Barely done boasting that its newly announced UltraSparc IV processor nearly doubles server performance, the company hints that the chip's successor will do the same again.

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Stephen Shankland
3 min read
SAN FRANCISCO--Barely done boasting that its newly announced UltraSparc IV processor nearly doubles server performance, Sun Microsystems hinted Wednesday that the chip's successor will do the same again.

Chief Executive Scott McNealy showed a version of the UltraSparc IV+, code-named Panther, at Sun's analyst conference here. But he left it to David Yen, executive vice president of Sun's processor and network products division, to disclose Wednesday that the new chip will include new high-speed cache memory that the current UltraSparc IV lacks.

Cache memory stores or retrieves frequently used information more quickly than a computer's main memory. One method of speeding cache memory is to include it directly in a chip's silicon, but Sun's current UltraSparc III and IV rely on a separate module.

Sun Chief Technology Officer Greg Papadopoulos confirmed the on-chip cache in an interview and said Sun expects the UltraSparc IV+ to double performance over UltraSparc IV.

Sun's chip plans are crucial to the company's success. The company must fend off competition--chiefly, IBM's Power processors and Intel's Itanium. However, Sun no longer relies just on UltraSparc; it accepted x86 chips such as Intel's Xeon and Advanced Micro Devices' Opteron into the product line and indeed hopes to use Opteron to get ahead.

"With Opteron, we're the lead dog, not the late dog," McNealy said.

Sun first incorporated of on-chip cache in its UltraSparc IIIi "Jalapeno" processor for midrange computers that debuted in 2003. The UltraSparc IIIi+ will have quadruple the on-chip cache, or 4MB, Yen said.

Moving to new manufacturing processes means circuitry shrinks in size, permitting more to be crammed onto a given area of silicon and paving the way for features such as cache memory. Where UltraSparc IIIi and IV are built by Texas Instruments using a process with 130-nanometer features, the IIIi+ and IV+ will be built with 90-nanometer features.

Sun's UltraSparc IV combines two UltraSparc III processors on a single slice of silicon, a so-called dual-core design technique that IBM and Hewlett-Packard have already adopted and that Intel and AMD will.

Following the thread
Sun also discussed its longer-range chip plans. Under a vision variously called chip multithreading or throughput computing, Sun is designing processors that are better able to juggle multiple instruction sequences, called threads.

Sun's dual-core UltraSparc IV can handle two simultaneous threads. Another chip, code-named Niagara, will be able to handle 32 simultaneous threads using eight cores that can each handle four threads, but it won't be able to execute a single thread at maximum speed.

For maximum single-thread performance, Yen said Sun will rely on the "Rock" family of processors, which also will be able to execute multiple threads. "The intent there is trying to get the best of both worlds," Yen said.

Yen said in an interview that Sun plans more than one Rock model. "It's not one size fits all," he said. Trying to design a chip that's good for everything means it ends up being good for nothing, he said.

In addition, he said that "the new generation of chip multithreading will provide extra optimization for Java code processing." Such features dovetail with Sun's message that it can outdo the team of Intel and Microsoft because Sun can design hardware and software features hand-in-hand better.

Outsiders told Sun it had to fulfill its promises in order for its ambitious throughput computing plan to be credible, and Yen said Sun is meeting those expectations. "We are executing to plan with respect to our throughput computing strategy," he said.

By way of evidence, he said Sun plans to "tape out," or complete the design, of UltraSparc V and Niagara this spring. It typically takes at least a year after tape-out to debug and test a chip and design new servers using it.