Pact focuses on shrinking chip parts
The three chip-industry giants--Infineon, AMD and UMC--team up to develop a 65-nanometer and 45-nanometer manufacturing process for the next generation of semiconductors.
The companies will jointly develop chips based on the 65-nanometer and 45-nanometer (or 0.065 and 0.045 micron) processes.
Such chips are expected to power the next wave of desktop, server and portable computers. The nanometer measurement refers to the size of the conducting threads within the processor's core. The finer the thread, the less power it consumes and hence the cooler it runs. This gives chip designers the wiggle room to squeeze in ever more transistors, to bump up processing power.
AMD and its much larger rival Intel are locked in a race to reduce the size of the processor core as a means of wringing out even more clock cycles, which currently top out at 2.53GHz for Intel's desktop Pentium 4 chip and at 1.8GHz for AMD's Athlon XP 2200+.
Intel's Pentium 4 processors and the Athlon XP 2200+ feature 130-nanometer technology, the current limit for mainstream products.
Each of the three companies in the joint development program will supply engineering resources and expertise to develop common platform technologies, Infineon said a statement.
Another aim of the project will be to allow the new chips to be cut from 300-millimeter wafers. Compared with the 200mm wafers in current use, 300mm wafers allow chipmakers to produce about 2.5 times more chips per wafer, increasing production volume, as well as reducing cost per chip by up to 30 per cent.
Infineon Asia-Pacific spokesman Kaye Lim said that the initial development work will be conducted at a UMC facility in Hsinchu, Taiwan. Next year, development will move to Singapore, where UMC already has struck separate deals with AMD and Infineon to build large wafer fabrication plants (fabs).
A previously announced UMC-Infineon wafer fab joint venture, known as UMCi, will see the creation of a $3.6 billion plant specializing in 300mm wafers. The facility is expected to be manufacturing wafers in quantity by the end of 2003.
The new agreement to build 65-nanometer and 45-nanometer technology follows earlier deals struck between UMC and Infineon to create 130- nanometer and 90-nanometer technology, as well as an existing program between AMD and UMC to develop 65-nanometer and 45-nanometer cores.
"AMD's joint development work with UMC and Infineon is a prime example of the type of cooperation that will come to lead the semiconductor industry in the age of 300mm manufacturing," Hector Ruiz, president and CEO of AMD said in the statement.
"This effort will form the foundation for AMD's 65- and 45-nanometer manufacturing technologies, and allow us to put additional development emphasis in process technology areas that are critical to our business and our customers, such as high-performance transistors and interconnects," Ruiz said.
CNETAsia's John Lui reported from Singapore.