IBM knits threading into Power5 chip

Simultaneous multithreading essentially allows a chip to run two applications, or two "threads" of the same application, at the same time--thereby reducing the time it requires to complete a task.

"We're seeing on the order of 40 percent (in performance improvement) being pretty common" in lab tests, Joel Tendler, director of technology assessment in IBM's systems group, said on Tuesday at Hot Chips, a semiconductor design conference taking place this week at Stanford University.

Big Blue presented a paper on its Power5 chips for servers at the conference. The Armonk, N.Y.-based company said it has samples of the chip running in its labs and has booted its AIX and OS/400 operating systems and the Linux operating system on it. The chip is scheduled to come out commercially in 2004.

Multithreading and multicore chips have moved to the forefront of chip design, as engineers have wrestled with ways to boost chip performance without drastically increasing energy consumption. When the decade began, energy consumption--which can drive up operating costs of systems and create problems with heat dissipation and signaling--was largely overlooked in processor design.

At the heart of multithreading is the concept of reducing idleness. Most subcomponents of a processor, such as the floating point unit that calculates decimal mathematics, sit around most of the time waiting for data from other subcomponents.

"Typically, what you see is that the execution units are busy only about 25 percent of the time," Tendler said. "The rest of the time is bureaucracy."

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Threading allows these subcomponents to act relatively independently and concurrently. To the operating system, a standard threaded chip looks like two processors. The Power5, which has two processor cores, or brains, looks like four processors.

"Simultaneous multithreading is a good way to recover some of that lost time," said Nathan Brookwood, an analyst at Insight64. "If one thread gets stalled, there is another waiting in the wings."

Although the Power5 is based on the Power4+ chip currently on the market, Tendler said adding multithreading required IBM to insert a number of features. For example, the number of "rename registers"--used by the processor to hold data during operation--has been expanded from 80 to 120, to avoid conflict between different chip subcomponents over resources. The chip was also designed so that a computer's operating system can prioritize tasks between threads.

The multithreading function will also not be activated by the computer if an application can't take advantage of it, Tendler said.

Because of the new functions, the Power5 is about 24 percent larger than the Power4+ and contains more transistors--which adds energy-consumption and manufacturing costs. Brookwood pointed out that multithreading will boost gross power consumption. But Tendler asserted that the trade-off is worth it, because chip performance goes up about 40 percent.