Intel sees dual-core Itanium by 2005
The company plans to cross an important technology threshold midway through the decade, squeezing two Itanium chips onto a single slice of silicon.
On higher-end networked server computers, two or more processors often share computing tasks. With chip manufacturing advances,
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"The middle of the decade is when we'll do that," said Mike Fister, general manager of Intel's Enterprise Platforms Group, at a news conference at the Intel Developer Forum here on Tuesday. Intel will make the move either using its next-generation manufacturing process, which can create circuitry with 90-nanometer features, or using the 65-nanometer generation after that, Fister said.
So far, only IBM sells servers with these "dual-core" chips, but Sun Microsystems and Hewlett-Packard are working on their own designs, expected as soon as next year. Intel's Itanium, a brand-new design requiring different software than that used with its Pentium and Xeon chips, is designed to compete with these server chips. The 64-bit chip is used mainly in high-end servers that typically run four or more processors.
Dual-core designs could help Intel lower Itanium's price tag enough so that it becomes appropriate for cost-conscious markets, where server sales are currently high, said Insight 64 analyst Nathan Brookwood.
"Right now, Itanium is stuck in a relatively low-volume niche. The challenge for Intel is how to migrate Itanium down into all but maybe the $2,000-to-$3,000 price bands," Brookwood said. "A dual-core chip could help them do that."
With each new manufacturing-process generation, circuitry becomes smaller, and more tiny computing switches, called transistors, can be fitted on a single silicon chip. Chip designers face the job of finding the best use for all the new transistors at their disposal, and building dual-core processors is one route.
The bigger the processor, the later the transition to dual-core chips can be made. Itanium, at about 400 to 450 square millimeters in size, "is about as big a chip as anybody's ever manufactured," Brookwood said. Itanium 2 currently is built on a 180-nanometer process, but the third-generation "Madison" chip will be built on a 130-nanometer process and thus will shrink to about 200 to 300 square millimeters, Brookwood said.
With 90-nanometer manufacturing, an Itanium would be about 150 square millimeters, Brookwood said, so a dual-core Itanium would be roughly 300 square millimeters, a practical size.
Madison is scheduled to arrive in the summer of 2003, said Mike Graf, product line manager for Itanium.
In branding strategy, Intel will re-use the Itanium 2 name for Madison, though with some variation so it can be distinguished from the current "McKinley" generation. Intel decided to use the same name because Madison chips can be plugged into the exact same computers that use today's Itanium 2 systems, he said.
Intel is preparing a lower-end Itanium 2 as well, code-named Deerfield. Deerfield will be designed to consume less power, thereby generating less waste heat and becoming better suited to smaller servers.
Fister said Deerfield will consume between 70 and 80 watts, a little more than the 60 to 70 watts of Pentium processors but significantly less than the 120 watts typically used by today's Itanium 2.