As chip geometries get infinitesimally small, IBM is looking to DNA to make the manufacture of future chips feasible.
On Monday, IBM researchers and collaborator Paul W.K. Rothemund, of the California Institute of Technology, announced an advancement of a method to arrange DNA origami structures on surfaces compatible with today's semiconductor manufacturing equipment.
"The cost involved in shrinking (chip) features to improve performance is a limiting factor in keeping pace with Moore's Law and a concern across the semiconductor industry," said Spike Narayan, a manager in the Science & Technology division of IBM Research, in a statement.
Moore's Law, named after Intel co-founder Gordon Moore, states that the number of transistors that can be placed on an integrated circuit doubles roughly every two years. For more than four decades, chip manufacturers have been able to consistently shrink chip geometries, allowing Moore's Law to remain on track.
But this may not be sustainable for chips with geometries under 22 nanometers. By 2014, the high cost of semiconductor manufacturing equipment will threaten Moore's Law, "altering the fundamental economics of the industry," according to a report released in June by iSuppli. New chip plants typically cost billions of dollars to build, and the tab goes up as chip circuits get smaller.
IBM uses DNA molecules as scaffolding--where millions of carbon nanotubes could be deposited and self-assembled into precise patterns by sticking to the DNA molecules. This approach might provide a way to reach sub-22-nanometer lithography--down to 6 nanometers--more economically, according to a paper to be published in the September issue of Nature Nanotechnology, entitled "Placement and orientation of DNA nanostructures on lithographically patterned surfaces." It was co-authored by IBM and Caltech scientists.
"The utility of this approach lies in the fact that the positioned DNA nanostructures can serve as scaffolds, or miniature circuit boards, for the precise assembly of components, such as carbon nanotubes, nanowires, and nanoparticles," according to IBM. The combination of self-assembly with today's fabrication technology eventually could lead to substantial savings in the most expensive and challenging part of the chipmaking process, IBM said.
The lithographic templates, for chip fabrication, were made by IBM using traditional semiconductor techniques, the same used to make the chips found in today's computers, to etch out patterns.