Applied powers up chip energy efforts

Applied Materials is promoting its "low-k" technology among chipmakers that need to better control the electricity that flows through their products.

Tech Industry
Applied Materials will put a tremendous amount of energy this year into taking power out of semiconductors.

The semiconductor equipment maker is kicking off an effort to promote its Black Diamond low-k technology among chip manufacturers that need to better control the electricity that flows through their products.

Black Diamond is essentially a thin layer that lowers the capacitance (k) in layers below transistors on a chip. Lowering the capacitance, or the amount of energy that can be stored in a specific region, reduces cross-talk between interconnects, the microscopic copper wires between chips, and allows signals to travel faster on them. The technology also reduces power consumption.

"If a signal is going across a line, you don't want it to get bumped by its neighbor," said Ken MacWilliams, chief technology officer in the dielectric systems and modules group at Applied.

Along with controlling power, Applied worked on the mechanical properties of the Black Diamond layer to ensure it won't crack.

Some companies are already inserting the technology into chips. Taiwan Semiconductor Manufacturing Co. (TSMC) qualified the technology on its 130-nanometer manufacturing process and shipped 10,000 wafers containing the technology last year, according to Chuck Byers, a spokesman for TSMC.

All of TSMC's 90-nanometer wafers will contain Black Diamond. The 130- and 90-nanometer processes refer to the average feature size on the chips. Ninety-nanometer production processes, which will lead to smaller and faster chips, are just starting to come out now. A nanometer is a billionth of a meter.

TSMC produces chips for ATI Technologies and others, and Applied is the largest supplier of semiconductor equipment in the world, so the technology stands a strong chance of becoming fairly widespread.

A number of 90-nanometer chips will contain low-k layers, "but once you get to 65 nanometers it becomes a necessity," MacWilliams said. Many companies have already produced 65-nanometer prototypes and plan to release such chips in late 2005 or early 2006.

Controlling power consumption and heat are the two most prominent challenges facing semiconductor designers today. As a result of Moore's Law, chips now come with millions more transistors than they did in the past. Intel's new Prescott chip sports 125 million transistors--far more than the 55 million found on other Pentium 4s. These transistors are also smaller and faster than their predecessors.

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More transistors, however, mean that these new chips consume as much, or more, power than household light bulbs. The smaller transistors also leak electricity, which further raises the power budget and creates heat.

Chip designers are experimenting with a variety of ideas. No single technology fits the bill. While chipmakers are putting low-capacitance materials into subtransistor levels, most also are working on ways to put high-k materials into transistor gates, which exist only a few nanometers away.

The complexity of the task is radically transforming how the chip industry operates. IBM, for instance, has begun to license its semiconductor research and development breakthroughs to Sony, Advanced Micro Devices and others that can't afford to conduct their own independent investigations. Other companies, such as Philips and Motorola, are forming joint development efforts.

Likewise, Applied Materials has shifted from strictly being a supplier of equipment to more actively participating in the design and development of manufacturing processes for its customers. The traffic between Silicon Valley equipment makers and Taiwanese chipmakers has become so constant that TSMC's Byers joked that the midnight EVA Airways flight out of the Bay Area has become something of a floating cocktail party.

"There are always two or three people you know on there," he said.

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