The money will be used to erect a building at the Leixlip campus for making processors on the 65-nanometer process and to acquire semiconductor manufacturing equipment. The facility will grow by about 60,000 square feet. Chip production will begin at the new facility in 2006. Intel's 2004 capital expenditure forecast range of $3.6 billion to $4 billion will accommodate the spending for the early stages of this project.
While Intel will invest $2 billion in the facility, it will also receive incentives and grants from Ireland's government, the company said. The cost of chip manufacturing facilities doubles approximately every four years under. The decision on where to locate a fab often comes down to the incentive packages put together by local governments, according to chip executives.
Manufacturing prowess has always been at the heart of Intel's success, according to, among others, Les Vadasz, former director of Intel Capital, and various analysts. Under the "copy exactly" strategy developed in the 1970s by Intel CEO Craig Barrett, the company seeks to perfect a manufacturing process at one location and then export it worldwide. In this way, Intel can introduce new technologies quickly and drive prices down rapidly.
Under the strategy, "exact" means exact, according to sources. Except for the language on the exit signs, facilities in Ireland and Israel are nearly indistinguishable.
In earlier years, part of Intel rival Advanced Micro Devices' problems stemmed from the fact that it seemed to follow a "somewhat similar" strategy,.
Moving to the 65-nanometer process will not be an easy jump for any manufacturer because of the small size of the transistors and the power the chips will consume. The power consumed by 90-nanometer chips has already caused some product delays and prompted Intel to shift to dual-core chips. (The nanometer figures refer to the average length of a feature on a chip; a nanometer is a billionth of a meter.)
In 2007 and 2008, the stakes will rise even higher whendebuts, according to various chip designers, because a number of new technologies will have to be incorporated into chips.
By 2021, the method of shrinking transistors on chips a la Moore's Law is.