The commission, which is part of the European Union, said it will provide 24 million euros ($29.7 million) in seed funding for the effort, called NanoCMOS, which will examine emerging discoveries in semiconductor materials, processes,and interconnections.
The study is aimed at finding ways to enhance semiconductor performance while reducing chips' overall density. This area of research has become known as, or the development of electronic circuits built on a .
The nanometer measurement, which is often used to describe a generation of chip manufacturing technology, also refers to the average distances between features inside a chip. A nanometer is a billionth of a meter. The chip industry is currently moving from a 130-nanometer manufacturing process to aone.
Funding for nanotechnology has taken off. Last year, President Busha bill that will provide $3.7 billion to nanotechnology projects over four years.
Next year, participants in the European research will scrutinize the potential use of 45-nanometer complementary metal-oxide semiconductor (CMOS) logic technology.
The group will also begin studying 32-nanometer and 22-nanometer nodes, which are currently believed to represent the limit of existing semiconductor circuit technologies.
Among the companies that have already pledged participation in the nanotechnology project are three of Europe's largest semiconductor manufacturers,, Philips and STMicroelectronics, as well as several research institutes, CEA Leti in France and IMEC in Belgium. The effort will also make use of a number of research laboratories and be overseen by three additional companies, Ion Beam Services, Isiltec and Magwel, and Acies Europe.
Project representatives said a major goal of the initiative is to establish Europe as a leader inthrough increased support of academic research and industrial development. The first phase of the project is expected to last just more than two years and include the proposal for a second phase of research, centered on 32-nanometer and 22-nanometer nodes, which is slated to begin in 2006.
The consortium will also propose experimentation with the use of a 45-nanometer node in a wafer-manufacturing site, most likely the Crolles2 facility, which is jointly shared by Motorola, Philips, and STMicroelectronics.
In related news, semiconductor industry experts are meeting this week in Boston for the NSTI Nanotechnology Conference and Trade Show.