The firm is planning new ways to increase chip speed. Could "spintronics" replace silicon-based technology?
Chip manufacturers will continue to follow the evolutionary path described by Moore's Law for several more years, but engineers will have to substantially change the underlying design and ingredients of their products, said several Intel researchers Friday at a presentation at the company's headquarters here.
And one of the big changes will involve enhancing, and then ultimately moving away from, chips made with silicon transistors, the basic building block of the entire tech industry. By 2014, chips may include transistors constructed with carbon nanotubes or silicon nanowires, rather than silicon. By 2020, more radical changes will likely be required.
"By 2010, we should have a pretty good idea of what (is) the device that will take us beyond CMOS," said Paolo Gargini, director of technology strategy at Intel. CMOS, which stands for complementary metal oxide semiconductor, is the technology base for silicon transistors.
Intel's outline of the future captures the challenges facing the industry overall. From the 1960s until the turn of the century, chip designers largely increased performance by shrinking the transistors that go on their chips and then increasing the number of those transistors. The reduction in the size of the transistors essentially reduces the distances electrons have to travel and hence increases performance. Adding transistors boosts performance and allows designers to integrate new functions.
Moore's Law, named for Intel co-founder Gordon Moore, states that engineers will essentially double the number of transistors on a chip every two years.
Unfortunately, the benefits have begun to wane. Starting in 2000, designers moved into what Gargini calls the "equivalent scaling" era, in which chip designers improve performance in part by shrinkage, but also by using additional technologies.
In 2007, for instance, Intel expects to start producing chips using the 45-nanometer process. These chips will differ from existing chips in part because the transistor gate will be made of metal rather than silicon, while the "gate oxide"--an insulating layer that controls the flow of electrons inside the transistor--will be made out of something other than silicon dioxide, which has been the material of choice for decades.
The new oxide gate will be about twice as thick as a gate oxide made out of silicon dioxide, but it will behave as if it were a thinner, higher-performance layer. Besides increasing performance, the thicker layer made of yet-to-be-disclosed material will leak less electricity.
"From an electrical point of view, the designer cannot tell the difference," Gargini said.
Enhancing silicon in this manner will allow engineers to develop chips made using the 22-nanometer process (a nanometer is a billionth of a meter), which should begin in 2011 or 2012. However, performance will need to be boosted again by 2015.
Then, designers will move into the "integrated solutions" era, in which chipmakers will replace the transistor gate with different materials, such as carbon nanotubes or carbon nanowires.
"Silicon is still the substrate for building these devices," said Ken David, director of components research in the Technology and Manufacturing Group at Intel. Nonetheless, many of the underlying components inside these CMOS-like transistors will be substantially different, as will many manufacturing processes.The novelties of nanotech
The tubes could also be used to conduct heat out of a computer. Using nanotubes inside transistors or to connect them may not start happening in chips until 2012 or 2015, David speculated, but they could start to serve as a way to cool PCs earlier.
Experimental results with nanotube and nanowire transistors show that these elements could provide three times the performance of conventional transistors at the same power level. Like other companies, such as NEC, Intel is experimenting with ways of growing the nanotubes directly onto a silicon wafer.
This process requires a 900 degree Celsius environment, microscopic balls of iron, and a gaseous bath of hydrogen and carbon monoxide. Now, many of the experimental nanotube transistors are made by creating a nanotube in a separate chamber and surgically inserting it into a silicon wafer.
Intel is also tinkering with ways of making chips out of wafers with layers of gallium arsenide and other so-called "III-V" compounds. Some communications chipmakers use these materials now, but "it is really hard to build these things on a large scale," David said. Ideally, Intel would like to figure out a way of retaining silicon as the basic wafer material and graft in layers of III-V materials.
Then, sometime around 2020, developing tricks to shrink CMOS or CMOS-flavored transistors will come to an end. Transistors will consist of only a few atoms, making it impossible to shrink them further.
Among some of the more promising ideas are spintronics, the science of creating ones and zeros by controlling the spin of electrons. Another possibility is the use of "phase change" devices, in which data is recorded by changing the physical state of a medium. Compact-disc-like material that can be melted, or crystallized, in microseconds is an example of a phase change substance. technology may also get integrated into chips.
Intel is seeding university labs to conduct experiments on these projects. Projects are ongoing at the University of California at Santa Barbara, the Georgia Institute of Technology and Yale University.
Although developing these new chips and materials won't be easy, with the advent of nanotechnology, governments around the world have dramatically increased their investment in chip technology. In 1997, government-funded research worldwide for nanotechnology in came to around $500 million. In 2003, it rose to $3.5 billion.
"For 20 years, there had been no investment in the basic sciences," Gargini said. "It was like Santa Claus was coming to town."