A startup called SiFive announced a new processor design Thursday that could revamp mobile phones, cars and other digital devices if the company's plans work out. Its Performance P650 design comes with a 50% speed boost over the that arrived in June.
The San Mateo, California-based company hopes its designs will offer a better balance of speed, battery life and cost thanks to a fresh start in chip engineering. The new approach comes from an effort called RISC-V that's backed by university researchers and now a lot of tech companies, too.
Even with the significant backing, it'll be difficult to get the RISC-V family to catch on widely in an industry that prefers the broadest technology foundations. That's why chip families like MIPS, Alpha, Itanium and PA-RISC were squeezed out of the computing industry. Survivors, like the x86 chips from Intel and AMD and the Arm chips from Qualcomm, Samsung and Apple, ship by the millions each year.
But if SiFive succeeds with its longer-term plans, you could get a SiFive-powered phone in a couple of years.
"By 2023, you're likely to see the first mobile phone with RISC-V," SiFive Chief Executive Patrick Little said in an October interview. "I think we have an excellent shot at the phone."
SiFive is one of the most prominent members of the RISC-V International alliance whose members are collectively developing a variety of RISC-V processors. At the alliance's heart is the RISC-V instruction set, the collection of commands that software uses to tell a chip what to do. Unlike with x86 and Arm, the RISC-V instruction set can be used and modified for free. SiFive develops RISC-V chip designs and licenses them to customers.
With performance comparable to Arm's 2-year-old midrange Cortex A77 design, the P650 won't be ejecting Qualcomm or other Arm designs out of smartphones anytime soon. Customers can start evaluating the design in the first quarter of 2022, SiFive said.
RISC-V Summit for RISC-V chip fans
SiFive announced its chip shortly before the RISC-V Summit begins Monday. That's a gathering of the ever wider collection of RISC-V chip fans. Google's Titan M2 security chip is a RISC-V design. Apple is exploring its RISC-V options, too.
The RISC-V designs embody a relatively modern chip design approach called reduced instruction set computing (RISC), and indeed the RISC-V project began with a luminary who co-created RISC, David Patterson. Arm chips also are RISC designs. Software controls Intel x86 chips with the older CISC, or complex instruction set computing, technology, but deeper down, even Intel chips use RISC technology.
Also on Thursday, RISC-V International announced several updates to give the RISC-V instruction set broader abilities that other chip architectures possess. The new instructions should speed up some complex mathematical and cryptographic operations and make the chips better suited to servers running in data centers. Ratifying the new instructions also could help keep RISC-V chipmakers on the same page, easing the lives of programmers trying to write software for the chips.
Another RISC-V startup is AI chipmaker Tenstorrent, whose chief technology officer is Jim Keller, a chip guru who's held positions at Intel, AMD and Tesla. Esperanto Technologies has revealed an AI chip design with more than 1,000 RISC-V processing cores.
Other RISC-V companies include AI chipmaker GreenWaves Technologies, maker of low-power chips Micro Magic, and Chinese cloud computing giant Alibaba, which has released an open-source RISC-V chip design anyone can use.