Harvard, Mitre cook up programmable nanoprocessor

Researcher says the bottom-up construction, in contrast with the way today's commercial circuits are built, points the way toward tomorrow's integrated systems.

Jack Clark
Programmable nanowire nanoprocessors
On the electron microscopy drawing board: programmable nanowire nanoprocessors. Photo courtesy of Charles M. Lieber/Harvard SEAS Communications

Researchers at Harvard University and Mitre have detailed the architecture for a programmable nanoprocessor built out of ultra-small nanowires.

The nanoprocessor, outlined in a Nature article published this week, is formed of 496 non-volatile field effect transistor (FET) nodes arranged in a 960-micrometer-square area, overlaid with semiconductor materials.

"This work represents a quantum jump forward in the complexity and function of circuits built from the bottom up," said Harvard's Charles Lieber, who led the research, in a statement. "[The work] demonstrates that this bottom-up paradigm, which is distinct from the way commercial circuits are built today, can yield nanoprocessors and other integrated systems of the future."

Read more of " Researchers detail programmable nanoprocessor" at ZDNet UK.