X

IBM's self-assembling nanotube chip tech (pictures)

Big Blue has developed a way to use a combination of chip patterns and chemical bonding to precisely place carbon nanotubes on computer chips. Here's a look at some of the technology involved.

stephenshankland.jpg
stephenshankland.jpg
Stephen Shankland
IBM-carbon-nanotubes-in-solution.jpg
1 of 10 IBM

Solution of carbon nanotubes

In this dark solution, IBM makes use of carbon nanutubes -- very small structures made of a lattice of carbon atoms rolled into a cylindrical shape. A team of eight researchers have figured out a way to precisely place them on a computer chip, IBM announced today. The new technique helps improve the nanotubes' chances in the hunt for alternatives once silicon transistor technology, the beating heart of today's, runs out of steam.
Mooresnanotube.jpg
2 of 10 IBM

Carbon nanotube model

A model of a carbon nanotube with no end caps.
nanotube-in-channel-model.jpg
3 of 10 IBM

Nanotubes aligned in hafnium oxide channel

This computer model shows how carbon nanotubes bond chemically with a special coating of materials in a trench of exposed hafnium oxide.
IBM_nanotubes_in_trenches.jpg
4 of 10 IBM

IBM carbon nanotube placement demonstration

The dark lines are carbon nanotubes that sometimes -- but not always -- are placed in trenches. The more accurately IBM can place the nanotubes, the more likely they can be used as semiconductor devices in computer chips. The density of carbon nanotubes shown here permits a billion per square centimeter.
IBM-carbon-nanotube-chip-closeup.jpg
5 of 10 IBM

IBM carbon nanotube test chip

In this close-up image, the very thin black lines are carbon nanotubes that span the gap between two electrical contacts. IBM strives to get only a single nanotube in each of the channels, visible as white outlines.
IBM-nanotube-fabrication-diagram.jpg
6 of 10 IBM

IBM carbon nanotube self-assembly technique

Chemical bonding attaches carbon nanotubes to channels of exposed hafnium oxide in IBM's fabrication process.
IBM-Hafnium-Oxide-nanotubes.jpg
7 of 10 IBM

Carbon nanotubes' hafnium oxide affinity

IBM's silicon wafers have two surfaces on top, hafnium oxide and silicon dioxide. This close-up image shows speckles of carbon nanotubes that bond only with the hafnium oxide, part of IBM's approach to positioning them precisely on a chip.
IBM-nanotube-wafer.jpg
8 of 10 IBM

IBM Carbon nanotube chip wafer

IBM researcher Hongsik Park looks over a chip wafer with carbon nanotubes. The wafer has two surfaces, trenches made of hafnium oxide that attract carbon nanotubes in a special solution silicon oxide that doesn't.
IBM-carbon-nantube-transistor-array.jpg
9 of 10 IBM

IBM carbon nanotube testing chip

IBM's technique can arrange single carbon nanotubes -- and sometimes pairs -- between two electrical contacts. It's an essential part of making a transistor in which a nanotube leads from a source on one side to a drain on the other. At left in this is an image of a chip designed to test the technology electrically; at right is a close-up of the nanotubes stretching from one electrical contact to another.
Graphene-CNT-buckyball.jpg
10 of 10 Royal Swedish Academy of Sciences

Carbon: Graphene, nanotubes, graphite

The chickenwire-like lattice of carbon atoms just one atom thick is called graphene, one candidate for a new chip semiconductor material. Another is a cylindrical configuration called a carbon nanotube. A 60-atom sphere is called a buckyball. Many sheets of graphene makes graphite, the form of carbon used in pencil lead.

More Galleries

Go Inside the Apple iPhone 15 and iPhone 15 Pro: See How the New iPhones Look and Work
iphone 15 in different color from an angled view

Go Inside the Apple iPhone 15 and iPhone 15 Pro: See How the New iPhones Look and Work

21 Photos
17 Hidden iOS 17 Features and Settings on Your iPhone
Invitation for the Apple September iPhone 15 event

17 Hidden iOS 17 Features and Settings on Your iPhone

18 Photos
Astronomy Photographer of the Year Winners Reveal Our Stunning Universe
andromeda

Astronomy Photographer of the Year Winners Reveal Our Stunning Universe

16 Photos
I Got an Early Look at Intel's Glass Packaging Tech for Faster Chips
Rahul Manepalli, right, Intel's module engineering leader, shows a glass substrate panel before it's sliced into the small rectangles that will be bonded to the undersides of hundreds of test processors. The technology, shown here at Intel's CH8 facility in Chandler, Arizona, stands to improve performance and power consumption of advanced processors arriving later this decade. Glass substrates should permit physically larger processors comprised of several small "chiplets" for AI and data center work, but Intel expects they'll trickle down to PCs, too.

I Got an Early Look at Intel's Glass Packaging Tech for Faster Chips

20 Photos
Check Out the iPhone 15's New Camera in Action
A photo of a silhouette of buildings on the water taken on the iPhone 15

Check Out the iPhone 15's New Camera in Action

12 Photos
Yamaha motorcycle and instrument designers trade jobs (pictures)
yamaha01.jpg

Yamaha motorcycle and instrument designers trade jobs (pictures)

16 Photos
CNET's 'Day of the Dead Devices' altar (pictures)
dia-de-los-muertos-3318-001.jpg

CNET's 'Day of the Dead Devices' altar (pictures)

9 Photos