The TI "Timeline" technology is a production technique that can cram 125 million transistors into one chip, about 20 times the maximum number of transistors available today. A single chip "could easily contain as many as 20 microprocessors," compared to the single processor currently found in chips, according to the company.
The technology could be used by an Internet server vendor to create an integrated modem pool with capabilities equal to about 100 modems by today's standards. Such a device could "permit data transfer rates far above the 28 kbps common [for today's modems]," TI said.
The Timeline technology--which used a 0.18-micron production process much finer than today's comparatively "fat" 0.5- or 0.4-micron process technologies--could also be used to create chips that run at speeds of 500 MHz or faster. A processor based on the TI technology would be able to perform at 300 MHz, 500 MHz, or even faster at an ultra-low power consumption level of 1.8 volts, but it would also be able to deliver chips that run at 100 MHz for small wireless devices while producing just 1 volt.
TI plans to begin work with beta customers in the third quarter of 1996 and start full-scale production in 1997.
IBM has also recently said it is doing work on dense chip and board designs that pack together a number of digital signal processors (DSP), which it intends to use for next-generation multimedia PC processors due out next year.