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NEC joins IBM on 32-nanometer chip research

Big Blue has added the Japanese company to a growing list of allies doing research on next-generation chip technology at IBM facilities.

Brooke Crothers Former CNET contributor
Brooke Crothers writes about mobile computer systems, including laptops, tablets, smartphones: how they define the computing experience and the hardware that makes them tick. He has served as an editor at large at CNET News and a contributing reporter to The New York Times' Bits and Technology sections. His interest in things small began when living in Tokyo in a very small apartment for a very long time.
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Brooke Crothers
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IBM has added NEC to its growing list of allied companies doing research on next-generation chip manufacturing technology.

On Thursday, IBM and NEC Electronics signed an agreement for joint development of next-generation semiconductor manufacturing process technology, which includes participation in an IBM-led effort focused on 32-nanometer chips and, later, 22-nanometer chips. Currently, companies like Intel and Advanced Micro Devices are bringing 45-nanometer chips to market.

Generally, as geometries get smaller, chips get faster and more power-efficient.

IBM has accumulated a large, eclectic group of chipmakers at its semiconductor fabrication facility in East Fishkill, N.Y., and the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, State University of New York.

The area is becoming a hub for chip research that, in essence, is trying to counter the huge multibillion dollar R&D budget of chip giant Intel. Not coincidentally, this isn't far from Advanced Micro Devices' proposed $3 billion chip facility in Malta, NY. AMD also does joint R&D with IBM.

Other members are Singapore-based Chartered Semiconductor Manufacturing, Freescale (formerly part of Motorola), Infineon Technologies, Samsung, STMicroelectronics, and Toshiba.

NEC currently co-develops 45nm and 32nm CMOS process technology with Toshiba and is now extending that scope of collaboration to include the 32nm and finer nodes with IBM and its alliance partners, the Japanese company said.

Specifically, NEC intends to work with the IBM research alliance to develop a common process platform and strengthen development and design ability for system-on-a-chip (SOC) technology--highly integrated silicon typically used in cell phones and consumer electronics devices.

"The new agreement with IBM means that NEC Electronics will develop a common semiconductor process with industry leaders, allowing us to focus on being first to market in areas of eDRAM products and SOC solutions that provide our customers with the added value, such as high reliability and low power consumption," Toshio Nakajima, president and CEO of NEC Electronics, said in a statement.

eDRAM, or embedded DRAM, is high-speed memory usually integrated onto the same piece of silicon as the main processor. This contrasts with traditional DRAM that is external to the processor. eDRAM can be used, for example, in system-on-a-chip designs.

Earlier this year, IBM and its partners unveiled "high-k/metal gate" on silicon manufactured at IBM's 300-millimeter semiconductor fabrication facility in East Fishkill--a technique that Intel also uses.

By implementing high-k/metal gate technology into its leading edge 32-nm technology, the alliance claims performance improvements in circuits of up to 35 percent over 45nm technology at the same operating voltage. The 32nm power reduction over 45nm can be as much as 30 percent to 50 percent depending on the operating voltage, according to IBM.