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Intel shows off its quad core

Clovertown, a four-core processor, will start shipping late this year and hit the market in early 2007.

Michael Kanellos Staff Writer, CNET News.com
Michael Kanellos is editor at large at CNET News.com, where he covers hardware, research and development, start-ups and the tech industry overseas.
Michael Kanellos
3 min read
Just as the bragging rights for dual-core chip supremacy are dying down, Intel gave the first glimpse of a quad-core chip coming next year.

Clovertown, a four-core processor, will start shipping to computer manufacturers late this year and hit the market in early 2007. Clovertown will be made for dual-processor servers, which means that these servers will essentially be eight-processor servers (two processors x four cores each).

The company will also come out with a previously announced version called Tigerton around the same time for servers with four or more processors.

Core expansion will be a dominant theme for Intel over the next few years, said Chief Technology Officer Justin Rattner. By the end of the decade, chips with tens of cores will be possible, while in 10 years, it's theoretically possible that chips with hundreds of cores will come out, he added.

Rattner showed off a computer running two Clovertown processors.

Multiplying the number of cores brings distinct advantages. First, it cuts down overall energy consumption for equivalent levels of performance. If the recent Core Duo chips released for notebooks from Intel had only one core, the chips would consume far more power, he said.

Integrating processor cores into the same piece of silicon or same processor package also increases performance by reducing the data pathways

"To go from core to core can be a matter of nanoseconds," Rattner said. "As soon as you move cores together you get an automatic improvement in available bandwidth."

Advanced Micro Devices will also come out with chips with four cores in 2007.

Nonetheless, adding cores requires careful planning. Energy efficiency, data input/output and memory latency (the time it takes data to go from memory and the processor and vice versa) will be major issues with each level of core expansion.

To get around some of these issues, Intel is conducting research into circuit design and chip architecture as it has in the past. In addition, the company is working with application developers to determine how the architecture of its chips can be optimized.

By working with one server application developer, Intel determined that it needed to make three small changes to the architecture of one of its future server chips. Before the changes, the application only ran well in simulations on chips with 16 cores. After that, performance began to decline, Rattner said.

After the changes, performance continued to climb. "We got it to scale well past 32" cores, he said.

Another pending change to chip design to accommodate problems that arise with core multiplication are Through Silicon Vias, or TSVs. With TSVs, processors and memory chips are stacked up and connected through tiny wires; the top of one chip wires directly into the bottom of another. Currently, chips connect through buses, long data paths that have become as crowded as rush-hour freeways in some computers.

Clovertown and Tigerton are members of a new chip architecture coming from Intel at the end of the year. A notebook chip called Merom and a desktop chip called Conroe coming out around the same time will be based on the same architecture. Intel will give the architecture a name at the Intel Developer Forum taking place in March.

Rattner indicated that Merom and Conroe will only be dual-core chips, as many analysts expect.

"The core growth on the client side will be slower than on the server side," he said. The new chip architecture "is intended for dual and multiple core architectures," he added.

Rattner would not state whether Tigerton and Clovertown contained a single piece of silicon, or two pieces of silicon in a single package. A processor is made of silicon and the package that surrounds it, so either definition could fit.

Two pieces of silicon in a single package seems more likely. At around the same time, after all, Intel will release Woodcrest, a dual core server chip based around the same Merom-Conroe-Tigerton-Clovertown architecture. It will contain only two cores and consume 80 watts of power, less than the 165-watt server chips Intel sells now.

A large financial institution is currently running servers on an experimental basis with Woodcrest chips, Rattner said.

Intel has already released one dual core processor that contained two pieces of silicon. While using two pieces of silicon can be cheaper to design and manufacture, some have said dual silicon chips don't provide the same level of performance.