Chief Technical Officer Justin Rattner demonstrated the processor in San Francisco last week for a group of reporters, and the company will present a paper on the project during the International Solid State Circuits Conference in the city this week.
The chip is capable of producing 1 trillion floating-point operations per second, known as a teraflop. That's a level of performance that required 2,500 square feet of large computers a decade ago.
Intel first disclosed it had built aduring last fall's Intel Developer Forum, when CEO Paul Otellini promised to deliver the chip within five years. The company's researchers have several hurdles to overcome before PCs and servers come with 80-core processors--such as how to connect the chip to memory and how to teach software developers to write programs for it--but the research chip is an important step, Rattner said.
A company calledon a single chip. ClearSpeed's chips are used as co-processors with supercomputers that require a powerful chip for a very specific purpose.
Intel's research chip has 80 cores, or "tiles," Rattner said. Each tile has a computing element and a router, allowing it to crunch data individually and transport that data to neighboring tiles.
Intel used 100 million transistors on the chip, which measures 275 millimeters squared. By comparison, its Core 2 Duo chip uses 291 million transistors and measures 143 millimeters squared. The chip was built using Intel's 65-nanometer manufacturing technology, but any likely product based on the design would probably use a future process based on smaller transistors. A chip the size of the current research chip is likely too large for cost-effective manufacturing.
The computing elements are very basic and do not use the x86 instruction set used by Intel and Advanced Micro Devices' chips, which means Windows Vista can't be run on the research chip. Instead, the chip uses a VLIW (very long instruction word) architecture, a simpler approach to computing than the x86 instruction set.
There's also no way at present to connect this chip to memory. Intel is working on a stacked memory chip that it could place on top of the research chip, and it's talking to memory companies about next-generation designs for memory chips, Rattner said.
Intel's researchers will then have to figure out how to create general-purpose processing cores that can handle the wide variety of applications in the world. The company is still looking at a five-year timeframe for product delivery, Rattner said.
But the primary challenge for an 80-core chip will be figuring out how to write software that can take advantage of all that horsepower. The PC software community is just starting to get its hands around multicore programming, although its server counterparts are a little further ahead. Still, Microsoft, Apple and the Linux community have a long way to go before they'll be able to effectively utilize 80 individual processing units with their PC operating systems.
"The operating system has the most control over the CPU, and it's got to change," said Jim McGregor, an analyst at In-Stat. "It has to be more intelligent about breaking things up," he said, referring to how tasks are divided among multiple processing cores.
"I think we're sort of all moving forward here together," Rattner said. "As the core count grows and people get the skills to use them effectively, these applications will come." Intel hopes to make it easier by training its army of software developers on creating tools and libraries, he said.
Intel demonstrated the chip running an application created for solving differential equations. At 3.16GHz and with 0.95 volts applied to the processor, it can hit 1 teraflop of performance while consuming 62 watts of power. Intel constructed a special motherboard and cooling system for the demonstration in a San Francisco hotel.