Explicitly Parallel Instruction Computing, or EPIC, technology will be incorporated into the Merced chip, a processor designed for servers and workstations that will appear in 1999, said Fred Pollack, director of the Measurement, Architecture and Planning Group at Intel. 2001 will then see a much more powerful, second-generation Merced chip "that will knock your socks off" and double performance, according to Pollack.
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EPIC technology is expected to lead to more efficient, faster processors because it eliminates numerous processing inefficiencies in current processors and attacks the perennial data bottleneck problems by increasing parallelism, rather than simply boosting the raw "clock" speed of the processor.
Specifically, in today's processors, much of the instruction scheduling--the order in which computing instructions are executed--is done on the chip itself, leading to a great deal of overhead and slowing down overall processor performance, according to Intel and HP. Moreover, today's processors are plagued by instruction flow problems since the processor often has to stop what it's doing and reconstruct the instruction flow due to inherent inefficiencies in instruction handling.
EPIC proposes to make the instruction scheduling more intelligent and handle much of the scheduling off-chip, in the compiler program, before feeding "parallelized" instructions to the Merced processor for execution. The parallelized instructions allow the chip to process a number of instructions simultaneously, increasing performance. A compiler prepares instructions for execution on the processor.
EPIC will "reduce the memory-to-processor latency," said John Crawford, director of microprocessor architecture at Intel, meaning that in current architectures, when a processor has to get data from memory there are relatively large delays. This shortcoming will be mitigated in the new instruction set.
Intel is also expected to boost the clock speed of the Merced chip so that it runs at speeds of 1000 MHz or higher. Between EPIC and increased clock speeds, overall chip performance should increase dramatically.
But there is a down side to all this wonderful technology. "The question you have to ask is, 'If this is so great why hasn't it been done before?', " quipped Martin Reynolds, an analyst at Dataquest, a marketing research firm. "The reason is that the compilers were so scary to do," he added, referring to the complex compilers that are required for this kind of instruction set technology and Merced-like processors.
Merced, the first chip to employ the EPIC architecture, will represent both an increase in performance and something of a test flight for Intel. Because the jump in technology is rather large for Intel, there's already room for improvement, Pollack indicated. "This is not like our previous transitions," he said.
Accordingly, Merced will not appear commercially in systems and be supported by new system software before 1999.
A second 64-bit (Merced) chip generation will follow in two years later, exhibiting twice the performance. "It goes into production in 2001," he said, without revealing the code name of the processor.
A number of system vendors promptly pledged support of the EPIC-Merced effort, including Compaq, IBM and Sequent. Both IBM and HP also reiterated their support for their own versions of Unix system software, called AIX and HP-UX, respectively.
Microsoft said that a 64-bit version of Windows NT would come out commensurate with the release of Merced. The forthcoming version will run both new 64-bit and older 32-bit applications. Microsoft will also deliver compiler technology. Merced will also run applications based on the 32-bit standard, said Pollack, but they will not run as fast as on the best 32-bit processors. Rather, users will get "mainstream 32-bit" performance, he said.
Pollack further added that Intel will continue to release chips based on the 32-bit architecture. 64-bit chips will, at least for the next few years, be found only in high-end workstations and servers. Desktops and mobile computers will be served by 32-bit chips like the Pentium II. In fact, differentiation between classes of 32-bit chips will increasingly occur over time, he said. Cache sizes and "slot" configurations, for instance, will be different between chips made for mobile computers and those for low-end servers.
"IA-32 will continue to grow at its historical rates," he said, pointing to a chart that showed 32-bit chips being released in 2003. "There are new IA-32 chips under development."