The new and as-yet-unnamed chip will be aimed at the so-called thin and light segment--laptops weighing less than 5 pounds. It will be sold alongside mobile versions of the company's Pentium 4 and Celeron chips.
The increasingly popular slimmed-down notebooks represent a challenge for Intel, as they require processors that consume less power and consequently generate less heat. Low-power consumption has been one of the main drawing cards rival chipmaker Transmeta hopes to use to grab a chunk of the market.
The chip, first mentioned at the Microprocessor Forum event last October, follows Intel's tradition of segmentation. Intel developed its Celeron and Xeon chips for low-cost PCs and PC servers. The company also created, despite delays, Itanium, its high-end server chip.
Like the Itanium project, the new mobile chip will be a ground-up design effort. It will include a number of design tricks aimed at decreasing power consumption while increasing overall performance. But Intel has been tight-lipped about anything other than the chip's purpose.
"As we anticipate the evolving needs of the mobile market, we said we'll develop more mobile-specific CPUs," said Don MacDonald, marketing director for Intel's Mobile Platforms Group.
"We'll continue to design CPUs for each and every segment," MacDonald said. "We'll end up with two significant CPU designs rather than one that voltage regulates down" as the Pentium III does.
Intel estimates it will need the new mobile chip by 2002. By then, the company estimates, some 60 percent to 65 percent of the notebook market will be made up of thin and light models.
These notebooks will not have the internal capacity to handle the heat produced by a mobile Pentium 4 chip, analysts say.
Intel's design philosophy for the new chip is to reduce power consumption as much as possible, without sacrificing performance.
"How do you get performance without increasing heat and power? That's going to require a radical rethink," MacDonald acknowledged.
Intel's former Timna design team is familiar with big challenges. Based in Israel, the group is stewarding the new chip's design.
Timna was Intel's ill-fated integrated Celeron processor. The chip would have featured a processor core, input and output controller, and graphics-processing engine in a single package aimed at reducing overall PC costs.
But the chip was designed for expensive Rambus-based memory, which has yet to migrate to the low end of the PC market. Intel was forced to push Timna back as it designed a memory translator hub, a chip that would translate memory signals meant for Rambus memory to the more popular SDRAM. Problems with the hub, which forced Intel to recall some 1 million motherboards, eventually led to the cancellation of Timna.
But it is likely that the former Timna team will put its knowledge to good use in designing the new chip.
The team's primary goal is to reduce power consumption without compromising other factors, such as clock speed, MacDonald said.
That means the team will likely combine several approaches by adding greater levels of feature integration and using a gated clock transistor design. Gated clock transistors can be turned off individually when not in use, thus reducing power consumption.
Intel will also use voltage switching similar to its SpeedStep Technology, which reduces voltage and clock speed on mobile Pentium III chips when a notebook is using battery power, MacDonald said. The chip will be based on an optimized version of Intel's 0.13-micron manufacturing process.
Analyst believe that Intel will likely base the design for the new chip on the mobile Pentium III processor core but will add new capabilities to it.
"If you just crank up the (clock) frequency, you burn up a lot of power," said Kevin Krewell, senior analyst with MicroDesign Resources, in Sunnyvale, Calif.
Krewell said Intel would likely go down a path of tweaking the Pentium III core to process a greater number of instructions per clock and also to increase clock speed. He said Intel will likely use a fairly large 512KB Level 2 cache as well as a new multimedia instruction set, possibly the Pentium 4's SSE-2.
Intel's track record with Rambus memory has been less than successful so far. Krewell said the company likely will avoid another Timna fiasco by choosing Double Data Rate (DDR) SDRAM memory. The chipmaker will also integrate a memory controller for SDRAM into the chip to save space and power and cut memory latency, he added.
"The real question is whether they'll pull graphics onboard," Krewell said. "Putting graphics onboard would limit the flexibility" of the chip.
Instead, "something like what Transmeta's Crusoe is right now would be optimal for Intel," Krewell said. The Crusoe chip sports an onboard DDR memory controller but requires separate a I/O controller and graphics, giving it flexibility to be used in several different kinds of notebooks.
The new mobile chip will compliment a forthcoming mobile version of the Pentium 4, based on Intel's 0.13-micron manufacturing process, which is code-named Northwood.