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HP to double up Itanium chips

Beginning in 2004, Hewlett-Packard will pair up future Itanium chips so twice the number can be shoehorned into a computer.

Beginning in 2004, Hewlett-Packard will pair up future Itanium chips so twice the number can be shoehorned into a computer.

The plans, which apply to the next-generation "Madison" and "Montecito" models in Intel's Itanium chip line, illustrate that Hewlett-Packard is able to expand on the basic processors that Intel offers, decreasing its reliance on the chipmaker. Processors are the single most important component of HP's future servers.

HP Chief Technology Officer Shane Robison discussed the products Wednesday at an analyst conference, arguing that the double-whammy chips will enable HP processors to leapfrog the performance of IBM's Power processor family.

IBM's current Power4 processor was the first "dual-core" server chip, taking advantage of an approach in which two processors are etched into a single slice of silicon. HP, Intel and Sun Microsystems are pursuing their own dual-core chips, but HP wanted something that worked like an actual dual-core Itanium earlier than Intel plans to release one.

HP plans to use this dual-chip packaging technology--in which two separate processors share the same data pathway connecting them to the rest of a computer--from low-end to high-end systems, said John Miller, director of HP server marketing.

"We feel it's important to be in the marketplace with a dual-core implementation, even though it's not exactly that," Miller said. "Everybody in the industry is going to be there."

Intel plans to make dual-core Itanium processors by "the middle of the decade," Mike Fister, general manager of Intel's Enterprise Platforms Group, said in September.

Palo Alto, Calif.-based HP developed the idea behind the Itanium processors, but Intel is taking the lead in the designing and building of the chips. HP has begun moving all its server lines to the Itanium family, and the double-chip packages will permit the company to offer more powerful servers, sooner.

"What that gets them is the ability to take any platform they design and put twice as many processors in it as they otherwise would have been able to," said Insight 64 analyst Nathan Brookwood. "It's very impressive."

Building extremely powerful Itanium servers sends a signal to prospective buyers that HP is serious about the product, but high-end Itanium servers aren't expected to be in widespread use anytime soon. The chips require software to be overhauled before it will work well on the new systems, and customers are conservative about making radical changes to servers that run critical tasks such as reconciling bank balances.

HP's Unix servers currently use the company's own PA-RISC processors, but they are designed to accommodate Itanium processors as well. The company's high-end Superdome server now can accommodate 64 PA-RISC chips, but a version coming in 2003 with the new PA-RISC 8800 processors will use 128 of them. The double-Itanium plan will be the way HP builds 128-processor Itanium systems as well, Miller said.

Intel said it will begin selling its "Madison" version of Itanium 2 next year, with "Montecito" scheduled to debut in 2004. In early 2004, HP plans to sell its "Madison Module," which pairs two Madison processors with some high-speed "cache" memory. The cache, which can supply information more quickly than the computer's main memory, compensates for the fact that two processors will be sharing one data pathway designed for a single chip.

In late 2004, HP will begin selling a "Montecito Module" as well, applying the same technique to the next Madison successor. HP won't make the modules available to other companies building Itanium servers, Miller said.

Current Itanium 2 "McKinley" processors, Madison and Montecito have the same connection technology and power requirements, allowing a computer with one to be upgraded with a newer model.

To make HP's Madison and Montecito double-chip modules consume only as much power as a single chip, HP likely will throttle back the chips' clock speeds, Brookwood said.