Two Japanese chipmakers intend to cooperate with foreign partners in building fabrication facilities for next-generation 256-megabit memory chips, according to a report in The Nihon Keizai Shimbun, Japan's largest business daily.
Major manufacturers are currently moving to the 64-megabit generation of memory chips. The 256-megabit generation will be able to store four times as much information in the same-size chip.
By sharing the cost of developing 256-megabit DRAM facilities, the companies hope to share the massive costs of building the factories.
Toshiba and IBM are teaming up to build a factory slated to start production in 1999. In addition to sharing expenditures, the companies will exchange technical knowledge to reduce research and development costs, according to the report.
At the heart of the two agreements is the development of the technology necessary to manufacturer memory chips using 300-millimeter (mm) diameter silicon wafers, which can produce twice as many chips as the current 200mm wafers, the report said. The increased output translates into a 20 percent cost savings per chip.
NEC and Samsung are still hammering out technical details of their agreement, but NEC at this point plans to introduce fabrication lines.