Live from Hot Chips 19: Looking beyond CMOS

Photonics. Nanotech. Quantum computing. Those fields may--or may not--be the keys to the future of integrated-circuit process technology.

This is the fifth in a series of posts from the Hot Chips conference at Stanford. The previous installments looked at multicore designs, IBM's Power 6 efforts, Vernor Vinge's keynote address , and Nvidia . Other CNET coverage may be found here. This is sort of an experiment for me; I usually prefer to have time to review my work before I publish it. If you see anything wrong, please leave a comment!

I'm back for one last session today, a panel discussion on the topic of "What's Next Beyond CMOS?" The question refers to the common processes for making complementary metal-oxide semiconductors.

The panel includes many leading experts in the field...

Moderator:

Norm Jouppi, HP Labs

Panelists:

Mark Horowitz, Stanford University
John Kubiatowicz, UC Berkeley
Mike Mayberry, Intel
Ghavam Shahidi, IBM
Stan Williams, Hewlett-Packard

Jouppi began by laying out the 40-year history of IC fabrication: 100:1 reductions in feature sizes, 10,000:1 increases in device counts, 100:1 increases in operating frequency, and total performance improvements of about a million to one.

He pointed out that CMOS scaling will eventually run out (as I discussed in this blog last month, here ), and explained what our choices are beyond CMOS:

  • CMOS (for people who don't believe CMOS scaling will run out)
  • Something else (obviously)

Having defined the scope of the panel, he retired to let the other panelists speak.

Williams took the stage next. He says that while the last 40 years were about getting more transistors on a chip, the next 40 years "will be mainly about getting more out of each circuit component"--that is, making better switching devices to replace transistors. Such improvements would not replace CMOS per se, but eventually there'd be nothing left that we recognize from current CMOS process technology.

He pointed to photonics and nanotechnology as possible sources of these improvements. Photonic switches could be better than silicon transistors because they can achieve higher switching bandwidth per unit of power, for example. Nanometer-scale electronic switches, using the electron tunneling effect, have interesting characteristics that may make them good candidates to replace the traditional transistor.

He ended by pointing out that according to the late scientist Richard Feynmann in the Feynman Lectures on Computation, it ought to be possible to achieve a six to eight order of magnitude in further performance improvements--another 40 years of progress at the current pace. What technology could make that possible is still unknown.

Shahidi was up next, predicting that the 11-nanometer process node--with linear dimensions four times smaller than those of the 45nm node just now being readied for production--may still be able to make its planned debut about eight years from now. That would lead us to chips with tens of billions of transistors; figuring out what to make with them is a big challenge in itself.

But the 11nm node is far from a sure thing. As to what might follow CMOS, he offered no suggestions.

Mayberry's argument was that simple CMOS scaling ended some time ago, and that we're already using a new model for device scaling. He says this new model will last longer than the simple scaling model suggests.

Mayberry was willing to mention at least one option for what might happen beyond about 10 years from now: new materials to implement what he referred to as "III-V quantum well devices". (If you're looking for a good explanation of this concept, don't look at me! But I found some III-V semiconductor materials listed here.)

Kubiatowicz went straight into quantum computing. He referred back to a story on Engadget in February that Canada's D-Wave Systems had built a quantum computer that could solve sudoku puzzles. Kubiatowicz expressed his doubt that this was a legitimate announcement, but was willing to consider what this technology might mean.

At the risk of oversimplifying beyond any concept of utility, quantum computers use bits that can hold both 0 and 1 states simultaneously; when a circuit is configured so that only the correct answer is possible, these states collapse into the one correct state. (That's my explanation, not his, so if it's useless, blame me.)

Kubiatowicz explained that quantum computer elements based on "ion traps" have already been built, but these elements have yet to be assembled into circuits with anything close to the complexity of a microprocessor.

Finally, Horowitz stood up and said, "What's after CMOS? Nothing. Can I go home now?"

He agrees that CMOS scaling will end eventually, and says he sees no other technology that can take over. He believes the focus of our industry will shift toward functionality--what you do with the silicon you can get--and power management.

There was a Q&A session following these presentations, but I didn't really hear any substantial new material, so I'll leave it at that. I'll be back in the morning with more Hot Chips coverage! Please add comments here if you have any.

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About the author

    Peter N. Glaskowsky is a computer architect in Silicon Valley and a technology analyst for the Envisioneering Group. He has designed chip- and board-level products in the defense and computer industries, managed design teams, and served as editor in chief of the industry newsletter "Microprocessor Report." He is a member of the CNET Blog Network and is not an employee of CNET. Disclosure.

     

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