Investigating Intel's Lynnfield mysteries
The recent announcements of new Core i7 and Core i5 processors, which use the Intel chip design code-named Lynnfield, raise some interesting questions about the company's product strategy.
I have a few questions to ask at this week's Intel Developer Forum....
Why is Intel using a more expensive chip for the new Core i5 and cheaper Core i7 processors? Why does this new chip--code-named Lynnfield--appear to have features Intel isn't using? What's the connection between Lynnfield and a future Intel chip code-named Jasper Forest?
These questions arose as I've been getting ready for IDF by reviewing recent press releases and news stories about Intel's current and forthcoming products, and chatting with fellow analysts about what we're looking forward to seeing there.
The recent announcements of the Core i5 and new Core i7 processors seemed pretty straightforward. Consider Brooke Crothers' piece on CNET: "." As Crothers explains, the facts are simple: the new Core i7 800-series slots in under the existing 900-series and replaces some older parts. The Core i5 is a new line, clearly positioned below the Core i7. Features, performance, and prices are all lower. That's as it should be.
But in looking at the coverage on some enthusiast sites, a fact jumped out at me. The Lynnfield chip is 12.5 percent larger than the Bloomfield chip used in the higher-priced Core i7 900-series processors (296 square mm vs. 263 square mm), in spite of the fact that Lynnfield only has two memory interfaces and no QuickPath Interconnect (QPI) link.
The big difference between the chips is the addition of 16 lanes of PCI Express on Lynnfield, but that's only about 80 pins plus the control logic. The changes should have roughly canceled each other out. Maybe one chip would be a little bigger than the other, but not by this much.
Here's Intel's labeled image of the Lynnfield die:
And here's an image of the Bloomfield chip:
It's easy to see how similar these chips are. The four Nehalem cores are clearly visible above the large L3 cache. There's the same T-shaped area for the on-die memory controller that sets Nehalem apart from previous Core-brand microprocessors.
Sharp-eyed readers may notice that Bloomfield has two QPI blocks, though only one is used for the Core i7 or Xeon 3500-series processors. This is because the Bloomfield die is the same design as the Gainestown die used for Xeon 5500-series processors. In a desktop system, a second QPI interface is not useful, so Intel just doesn't use it.
Sharing chip designs like this is common in the microprocessor business. Sharing makes good sense when two products are this similar. Bloomfield parts carry around the extra die area of the second QPI interface, but it's a small part of the die; no big deal.
But looking closely at these chips--especially with the assistance of a very high-res Bloomfield die photo--I noticed that all of the I/O circuitry present on Bloomfield appears to be present on Lynnfield as well.
The full three-channel DRAM interface, the two QPI links, both of the "Misc IO" blocks--it all seemed to be there. That is, except for the lower-left corner of the Lynnfield die photo, which was suspiciously blank--a flat blue color indicating that nothing was on that part of the chip at all. I didn't believe that.
And then I remembered the die photo Intel published on the Pressroom page for IDF 2009. This photo was of a future chip code-named Jasper Forest, but it looked very similar to the Lynnfield chip. Here it is:
The lack of detail in some areas suggests this could be a die plot rather than a die photo; it's a mirror image and the colors are different, but those quibbles aside, this chip seems to be pretty much identical to Lynnfield.
Jasper Forest is meant to support dual-processor configurations, so it has to have QPI; that's how Intel connects chips together these days.
Assuming Jasper Forest is Lynnfield, it becomes possible to compare the unlabeled Lynnfield die plot to the unlabeled Bloomfield die photo, and it's pretty easy to see that yes, all that I/O is on both chips, and Intel "shopped" out the contents of the QPI 0 block on the labeled Lynnfield photo.
And there's one more bit of supporting evidence. Although Lynnfield officially doesn't have a QPI interface, and it definitely doesn't have any pins assigned for one, the Core i5/Core i7-800 data sheet documents the software registers used to control a QPI interface.
So much for all the detective work. What are the practical consequences?
Essentially, the basic Lynnfield chip design, which is used in high-volume PC desktop and server processors and will probably be the basis of future Nehalem-microarchitecture mobile processors as well, is carrying around a lot of extra baggage.
This isn't like the Bloomfield/Gainestown sharing. There, the extra die area was a very small part of the overall chip--too small to be worth removing. With Lynnfield, a relatively large chunk of die area (perhaps 10 percent by my estimate) is simply not being used.
Because die cost is roughly proportional to the square of the die area (it reduces both the number of die per wafer and the effective yield), the unused circuitry could be increasing the net cost of the chip by 15 percent to 20 percent.
The penalty could amount to $10 or more per chip, which translates to several points of gross margin on every sale. While it's true that Intel would have had to spend $10 million or more to tape out a more optimized part, the company presumably hopes to sell many millions of these chips, so those upfront costs would have been repaid quickly.
With Intel under pressure from Wall Street to increase its gross margins, I don't understand the decision to price this part below the Bloomfield derivatives in spite of its higher cost.
Now, even if I'm right about Lynnfield's higher cost, it's still good news to PC buyers and OEMs. Lynnfield is a more efficient design than Bloomfield and delivers very competitive performance in spite of the unimplemented features. The on-chip PCI Express interface is a much better deal for graphics; with Bloomfield, reads and writes to graphics chips had to go through the chipset. Similar benefits will probably be seen on servers, where storage controllers and other high-performance peripherals can now be closer to the CPU and main memory.
I also wonder where Lynnfield's extra features will be used. Will we see a desktop processor with PCI Express, QPI, and all three memory channels? Such a chip would be a natural extension of the Core i7 family, and pretty darned attractive for high-performance systems.
I suppose we'll find out eventually. I just wish Intel would be a little more open about its product planning and not resort to misdirection and obfuscation, especially when it's releasing all the pertinent facts and photos anyway.