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Intel accelerates Itanium schedule

The company changes the release schedule for Itanium for servers, adding a new chip for 2004 and moving up the launch date of an Itanium with two processor cores.

Michael Kanellos Staff Writer, CNET News.com
Michael Kanellos is editor at large at CNET News.com, where he covers hardware, research and development, start-ups and the tech industry overseas.
Michael Kanellos
4 min read
Intel has changed the release schedule of its Itanium chips for servers, adding a new chip for 2004 and moving up the launch date of an Itanium with two processor cores to 2005 from 2007.

The changes reflect Intel's confidence in its ability to release high-end server chips faster than competitors and thereby gain the performance high ground, said Jonathan Eunice, principal analyst at Illuminata.

Itanium 2 ranks with the best server chips in the market, but the new release schedule will likely enhance the chip's attractiveness and put pressure on competitors to step up their own schedules, something that they have been loath to do.

Intel's "design teams and design resources are well stocked, so they can do a shrink early or do a dual-core (chip) early. They have a lot of leeway that would stress out a Sparc development team," Eunice said, referring to shrinking the size of components on a chip and to Sun Microsystems' UltraSparc processor.

Under the new schedule, the Santa Clara, Calif.-based chipmaker this summer will release Madison, a souped-up version of the current Itanium 2 with 6MB of level 3 cache, according to Jason Waxman, marketing manager for enterprise processors at Intel. Increasing the cache, a reservoir of memory located on the processor, generally enhances performance.

The chip, which will contain around 500 million transistors, will run at 1.5GHz. Madison, like the entire Itanium family, is a 64-bit chip, meaning that it can digest data in 64-bit chunks (as opposed to 32-bit Pentium chips). Typically, 64-bit chips fit into the most expensive and powerful servers.

Soon after, Intel will release Deerfield, an energy-efficient Itanium 2 for rack and blade servers.

Then, in 2004, the company will come out with a new version of Madison that will contain 9MB of level 3 cache. Most server chips currently come with 1MB of cache. This chip was previously not on Intel's product road maps, Waxman said.

Two cores better than one
In 2005, Intel will follow with Montecito, which will contain two Itanium processor cores on the same piece of silicon. Dual-processor chips are pretty much what they sound like: single chips that contain two separate "brains" so they can best a single-core chip but cost less than two separate ones.

It's one of the hot design ideas in the chip world. IBM has already come out with the first dual-processor chip for the server market, Power4. Sun's UltraSparc IV, debuting toward the end of the year, is expected to contain two processor cores.

Analysts have also noted that Advanced Micro Devices' Opteron chip, coming out in the first half, could be redesigned to accommodate a second processor core.

Originally, Montecito, due in 2004, wasn't a dual-core chip, but it was morphed after engineering and manufacturing teams concurred that a dual-processor chip could be mass-manufactured at Intel by 2005.

"Our dual-core (chip) was originally planned for the following generation of chips," said Waxman.

Besides enhancing performance, Intel may use its dual-core chips to undercut IBM, said Kevin Krewell, senior editor at the Microprocessor Report. In larger servers, Oracle and other software vendors charge a licensing fee for every processor in a given server.

To date, IBM has said that the Power4, although a single chip, has two processors. Hence, software customers have to buy two licenses for each Power4 chip. Intel is already indicating that it will consider Montecito a single processor, requiring only one software license, Krewell said.

"I think they are going to sell it that way to make it cost effective" to switch to Itanium from other servers with different chips, Krewell said.

Montecito, Krewell added, will be made on the 90-nanometer process, which means the average feature inside the chip measures 90 nanometers. Madison, Madison II and Deerfield will contain features measuring 130 nanometers. The current Itanium 2 comes with 180-nanometer features. Reducing feature size allows companies to squeeze more transistors on a chip.

Not as sweet by any other name
Continuity is another theme. Madison, Deerfield and Madison II will be sold under the Itanium 2 name.

All of the forthcoming chips, including Montecito, will also fit into the same motherboard sockets and be capable of using the same chipsets currently used in Itanium 2 servers, said Waxman. In turn, this will reduce the need for server makers to redesign their servers with each new chip release, smoothing the commercial adoption.

Despite its long and often controversial history, the Itanium family appears to be gaining momentum in the market, according to Eunice. In the mid-1990s, analysts speculated that the chip, designed by Intel and Hewlett-Packard, would become one of the most popular for high-end servers. However, the first version, formerly code-named Merced, was delayed several times and offered only middling performance. It finally debuted in 2001; sales were dismal.

Itanium 2, formerly McKinley, came out in July 2002 and was substantially different from the first Itanium. Analysts have given it fairly positive reviews.

Itanium 2 "competes or outperforms the fastest Alpha and Power chips. It is right up there at the elite country club of performance," Eunice said.

Still, despite strong benchmark scores, sales started slow. The economy was in a slump, which discouraged interest from customers, software developers and hardware makers.

Interest, though, appears to be growing, Eunice said. Laboratories and other scientific customers are increasingly offering Itanium 2 servers. More software tools are also coming onto the market. If the tide changes, Intel could benefit.

"2002 was a terrible time to launch a new technology," said Eunice.