IBM shows off low-power chip technique

Big Blue announces a design that it says paves the way for cell phone chips that use only one-fifth as much power as today's processors.

IBM on Tuesday announced a design that it says paves the way for cell phone chips that use only one-fifth as much power as today's processors.

To make those chips possible, the company is marrying several manufacturing advances that previously were seen as incompatible. Under its new process, IBM said it can build silicon germanium bipolar chips on a special type of thin wafer, known as silicon on insulator (SOI). Previously, SOI was primarily used for making traditional CMOS chips that use complementary metal-oxide semiconductor technology.

The technique should allow chip designers to mix many more types of circuits on a single wafer than had been possible before, said Tak Ning, a fellow at IBM's Watson Research Lab in Yorktown Heights, N.Y.

"We are challenging the circuit designers to come up with novel circuits," Ning said.

IBM said chips made with the new process could be coming off production lines in about five years. The new chip design could eventually find its way into a variety of uses, IBM said, such as providing cars with "smart cruise control" and collision-avoidance systems or boosting the power of a cell phone to handle tasks such as video playback.

Advancing the state of the art in power management has been a key goal for chipmakers such as Intel and IBM. While a long-running PC processor war has been all about cranking clock speed up to the next gigahertz, much of the chip industry is focused on how to create chips that run at more modest speeds but consume low amounts of power.

Earlier this month, for example, Advanced Micro Devices showed off an experimental transistor with three gates. Intel outlined plans for a similar transistor in June.

IBM is presenting details of its design at the 2003 Bipolar/BiCMOS Circuits and Technology Meeting in Toulouse, France.

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