A shift in Intel bus architecture coming next year
CSi. No, it's not a cop show.
Intel will come with a new way to connect its chips in 2008/2009, a shift that marks a big change in how the company's chips function.
The Santa Clara, Calif.-based chipmaker will move to the Common System Interface, a high-speed way to connect chips, at that time. David Kanter of Real World Technologies provides more details here.
Intel put out the first papers on CSI in 2004 and has provided incremental details as well as changed some of the details over the years. (Sometimes, people called it Common System Interconnect.) Canter, though, gives you a pretty thorough overview on the technology.)
Processors will communicate with each other through CSI. Memory in these computers, however, can also be distributed, thus meaning that processor-to-memory communication will also be helped by CSI. Now, in Intel processors, this traffic goes through a channel called the front side bus, which has been around for years.
Chip interconnects is where the action is in the chip world. Although processor performance has climbed steadily year after year, interconnect performance has improved at a much slower rate, resulting in latency. A couple of start-ups such as Tilera have emerged in recent years to try and solve this problem.
A good interconnect can separate you from the pack. Pat Gelsinger, one of the key execs at Intel, got a huge career boost way back when by leading a team that figured out how to boost the speed of the bus.
When the Opteron and Athlon chips from Advance Micro Devices came out in 2003, some people assumed the big deal about the chip was that it could process data in 64-bits.
In reality, the big things were the integrated memory controller and HyperTransport, a high-speed chip-to-chip connection. The memory controller boosted performance by about five percent while HT gunned it by ten percent, said Dirk Meyer, now AMD's president, back then. (Most Athlon buyers have actually never used 64-bit software.)